Adaptive Reduction of Power Consumption of Viterbi Decoder using Reconfigurable Processor
| dc.contributor.author | Kishimoto, Yuken / 岸本, 有玄 | |
| dc.date.accessioned | 2014-05-16T01:07:47Z | |
| dc.date.available | 2014-05-16T01:07:47Z | |
| dc.date.issued | 2007-03-23 | |
| dc.description | 修士（工学）, 2006, 開放環境科学専攻 | |
| dc.identifier.uri | /sigma_local/handle/10721/2935 | |
| dc.language | en | |
| dc.publisher | 慶應義塾大学理工学研究科 | |
| dc.subject | ビタビ復合 | ja |
| dc.subject | リコンフィギャラブルプロセッサ | ja |
| dc.subject | ソフトウェア無線 | ja |
| dc.subject | Viterbi Decode | en |
| dc.subject | Reconfigurable Processor | en |
| dc.subject | Software Defined Radio | en |
| dc.title | Adaptive Reduction of Power Consumption of Viterbi Decoder using Reconfigurable Processor | en_US |
| dc.title.alternative | Adaptive Reduction of Power Consumption of Viterbi Decoder using Reconfigurable Processor | en_US |
| dc.type | 学位論文 |