A Parametric Study of Packet-Switched FPGA Overlay Networks
dc.contributor.author | Wang, Daihan / 王, 代涵 | |
dc.date.accessioned | 2014-05-16T01:08:12Z | |
dc.date.available | 2014-05-16T01:08:12Z | |
dc.date.issued | 2006-09-21 | |
dc.description | 修士(工学), 2006, 開放環境科学専攻 | |
dc.identifier.uri | http://iroha.scitech.lib.keio.ac.jp:8080/sigma_local/handle/10721/3241 | |
dc.language | en | |
dc.publisher | 慶應義塾大学理工学研究科 | |
dc.subject | FPGA | en |
dc.subject | Networks-on-chips | en |
dc.subject | router | en |
dc.subject | simulation | en |
dc.title | A Parametric Study of Packet-Switched FPGA Overlay Networks | en_US |
dc.title.alternative | A Parametric Study of Packet-Switched FPGA Overlay Networks | en_US |
dc.type | 学位論文 |